Addressing modes || 8086 microprocessor

 

Addressing modes of 8086 microprocessor:

The addressing modes of an 8086 microprocessor are the methods by which the microprocessor determines the position of operands or data – The 8086 performs the required function in data when it executes an instruction.

• Data (operands) May be stored in one of the microprocessor's internal registers – It's possible that it'll be saved at a memory address – It's possible that it'll be stored at an I/O terminal.

Various modes of addressing – Immediate operand addressing – Direct addressing – Register operand addressing • Register direct addressing • Register indirect addressing • Register relative addressing – Memory operand addressing Immediate operand addressing – Direct addressing – Register operand addressing

Immediate Addressing

• What happens in immediate addressing? – The data comes after the opcode. – The instruction would be encoded with an immediate operand. – The data may be one or two bytes. These data are provided by the programmer; immediate addressing does not necessitate the use of a memory address;

Immediate operands usually represent constant data since the data is encoded directly into the instruction. – Immediate addressing needs only an opcode followed by the data to be worked on. Only a source operand can be defined in this addressing mode.

15 MOV AL H

A byte-wide immediate source operand is represented by the source operand 15H. Register addressing is used for the destination operand, which is the contents of AL. As a result, both the immediate and registers addressing modes are used in this instruction.

The source operand is fetched from the queue, not from memory, when it performs the transfer operation, and no external memory operations are performed.

– The operand is stated specifically in the instruction. An operand field replaces the address field and contains the operand.

Direct Addressing

• Direct addressing mode – The address of the object to be accessed is encoded in the instruction as an immediate, making the instruction larger and requiring more clock cycles to access – For all but the oldest x86 processors, the address should be in the cache since it is the bytes immediately following the opcode, and fetching the opcode usually causes at least a cache line behind it to be fetched.

The effective address of the operand is stored in the address field of the instruction. – To get the operand, only one memory reference is needed. – Absolute addressing mode is another name for it.

The operand is stored in a register set – the instruction's address field points to a CPU register that holds the operand – no memory access is needed to retrieve the operand.

 

Register Addressing

• What is the address of the register? – The operand to be accessed is defined as being stored in an 8086 internal register.

• The data registers are the only ones that can be accessed as a byte or a name.

MOV AX, BX

(1) “Move or copy the contents of BX, the source operand, to AX, the destination operand,” says the acronym. The word contents of the 8086's internal register have been defined as both the source and destination operands.

2) The “MOVAX, BX” instruction is located at physical address 01000H and the logical address generated from CS and IP (CS: IP) points to it. This command is retrieved from the 8086 instruction queue, where it is held waiting to be executed.

Register Indirect Addressing

Register indirect addressing – The instruction specifies which register points to the memory location containing the required data, as well as the opcode. – The instruction specifies which register holds the required information. The register indirect addressing mode can indicate a register pair that points to the correct memory address, depending on the size of the microprocessor's address space.

The 8088's Effective Address (EA) is stored in either a base register or an index register. The index register can be either source index register SI or destination index register DI, and the base register can be either base register BX or base pointer register BP. A segment override prefix allows entry to a different segment register.

Indirect addressing mode – The address field of the instruction specifies the memory position containing the operand's effective address.

To get the operand, you'll need two memory references.

• Segment base address (SBA) identifies the segment's memory start location – Any of the four-segment registers can be used as the physical segment base source for calculation.

• CS

 • DS

 • SS

 • ES

 • Effective address (EA) – Represents the operand's offset from the start of this memory section.

The instruction's address field corresponds to a CPU register that holds the operand's effective address. To get the operand, only one memory reference is needed.

Register Relative Addressing

• The offset address is the addition of the content in the register and an offset – Like MOV AX, 1234H [SI], relative addressing is much like indexed addressing

MOV AX, [BX+DATA]

The effective address of the operand is obtained by adding the content of the program counter with the address part of the instruction.

Effective Address = Content of Program Counter + Address part of the instruction.

Based Addressing

• Based addressing – The offset address for any operand is stored in the base register BX

MOV AL, [BX]

The effective address of the operand is obtained by adding the content of the base register with the address part of the instruction.

Effective Address = Content of Base Register + Address part of the instruction.

Based Indexed Addressing/Base plus Index Addressing Mode

 • Base plus Index Addressing Mode – The DX register is used to add the content of the base. In based addressing mode, the sum of the contents of the BX/BP registers and 8-bit/16-bit displacement determines the operand's offset address. Combining based and indexed addressing modes yields a new, more efficient mode known as based-indexed addressing mode.

The EA's value can be defined in a number of ways. One method is to explicitly encode the operand's effective address in the instruction. This is the most basic form of memory addressing, also known as direct addressing mode. The effective address's base value can be found in either the base register (BX) or the base point register (BPR) (BP). It also specifies the sizes for displacement that are permissible.

A = Base + Index + Displacement.

By combining the contents of the index register with the address portion of the instruction, the effective address of the operand is obtained.

Effective Address = Content of Index Register + Address part of the instruction.

Base Relative Addressing Mode

• Characteristics – The offset address is stored in the Base register, but it differs in that it contains some displacement. This displacement can be 8 bits or 16 bits in size. As a result, the offset address would be identical to the base register's contents + 8/16 bit displacement.

MOV AL, [BX 05] H       here, displacement is 8 bits

MOV AL, [BX 1243] H             here, displacement is of 16 bits

 

Relative based Indexed Addressing/Base Relative plus Index Addressing

 • In indexed addressing mode, the operands offset address is calculated by adding the contents of the SI or DI registers and the 8-bit/16-bit displacements.

String Addressing

• String addressing – Unlike the previous cases, the instructions that deal with strings do not use the usual addressing modes. As a result, there are no registers specified in the operand field of string instruction. Take, for example, the string instruction MOVSB (move byte string). The instruction contains no processor registers, but the processor understands that it can use both SI and DI during execution (as well as DS and ES).

All string-based instructions presume that the SI register points to the first element of the source string (which may be a byte or a word value) and that the DI register points to the first element of the destination string – the 80x86 will automatically change the contents of SI and DI during string instruction execution.

Port Addressing

• In their incorporation of the use of I/O ports for data communication between the processor and the outside world, Intel brand microprocessors vary from other processors on the market – Reading data from memory is one method of getting data into the processor; another method is to read data from an input port. When sending data out of the CPU, we have the option of storing it in memory or sending it to an output port.

Method 1: An I/O port is accessed in the same way as memory is accessed: the address of the I/O port is placed on the address bus, and certain control signals are activated. The I/O port's address can be explicitly coded into an instruction.

• The 80x86 offers up to 65,536 input and output ports to the programmer (although many useful designs rarely use more than a handful of I/O ports).

Auto-Increment Addressing Mode

This addressing mode is a subset of the Register Indirect Addressing Mode, in which

Effective Address of the Operand = Content of Register.